Zugriffsnummer 24540
Dokumenttyp Konferenzartikel in Zeitschrift
Sprache Englisch
Titel Advances in flash memories
Autor(in); Institution
Ludwig, Christoph; Q-Cells SE, Bitterfeld-Wolfen, GERMANY
Beug, Marc Florian; 2.6, Elektrische Quantenmetrologie, PTB-Braunschweig
Küsters, Karl-Heinz; Conergy Solar Module GmbH, Frankfurt (Oder), GERMANY
Quelle/Jahr Materials Science - Poland: 28 (2010), 1, 105 - 115
ISSN 0137-1339
URL
Verlag Wroclaw: Oficyna Wydawn. Politechn.
Konferenzangaben 3rd Workshop on Hybrid Nanostructured Materials, Prague, 05, November, 2007, Czech Republic
Freie Schlagworte Non-volatile memory ; Flash ; Charge-trapping ; SONOS ; TANOS ; High workfunction gate ; High-k dielectric ; Double patterning ; Erase saturation
Zusammenfassung In this article we discuss the fundamental challenges of the down-scaling of flash memory cells for mass storage applications. A general scaling issue for all different memory cell concepts is the structuring limit of conventional lithography. Therefore sub-lithographical structuring methods like e.g. double-patterning for future flash chips will be evaluated. Another common scaling challenge of charge trapping (CT) and floating gate (FG) cells, the two future concurrent flash memory cell concepts, is the introduction of new materials such as high-k dielectrics. Their implementation into CT and FG cells and the scaling related electrical issues of both cell concepts will be also discussed.

Zitierung

Ludwig, C., Beug, M. F., & Küsters, K.-H. (2010). Advances in flash memories. Materials Science - Poland, 28(1), 105–115.

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